Altera is now shipping our Cyclone® IV FPGAs, the market's lowest cost, lowest power FPGAs, with an integrated 3.125-Gbps transceiver variant. Learn how to meet increasing bandwidth requirements while lowering costs in high-volume applications in this presentation. http://www.altera.com/b/cyclone-iv-fpga-shipping.html

1. Lowest Cost, Lowest Power, Integrated Transceivers March 2010 Cyclone IV FPGAs

2. Cyclone IV FPGAs - The Next Generation www.altera.com/products/devices/cyclone-iv/cyiv-index.jsp Cyclone IV GX FPGAs Cyclone IV E FPGAs Lowest cost and lowest power FPGAs with transceivers Lowest cost and lowest power FPGAs

8. Broadcast Video Capture Card EQ EQ Rx Rx FPGA Tx DR PCle x4 PCle x4 SD, HD, FHD SD, HD, FHD SDI Save Over 30% System Cost PCle x4 EQ EQ DR Triple-Rate SDI SDI Triple-Rate SDI

9. Consumer Video Displays Meet High Video Quality Requirements Quickly and Cost Effectively Tuner Board Tuner ASSP Panel Board TCON 4Kx2K/3D (12b, 240 Hz) V-by-One Tuner Board Tuner ASSP Panel Board ASIC/ FPGA TCON 720p/1080p LVDS

10. Low-Power Leadership Cyclone III FPGA Cyclone IV E FPGA (1.0 V) Relative Total Power 25% Cyclone III FPGA + ASSP Cyclone IV GX FPGA Transceiver ASSP + I/O Interface 30% 1.0 1.0

11. Cyclone IV GX Key Architectural Features MPLL – Multi-purpose phase-locked loop for transceivers Up to 150K LEs Up to 8 Transceivers, up to 3.125 Gbps PCIe Hard IP Block Up to 6.5-Mb Embedded Memory Up to 4 MPLLs Up to 400-Mbps External Memory Interfaces Up to 360 Embedded Multipliers Up to 475 Flexible User I/O Pins Up to 4 PLLs

15. Easy-to-Design Transceiver I/Os Feature Benefit PCIe hard IP block No timing closure required Pre-emphasis and equalization Optimize signal integrity without re-spinning PCB General board design guidelines Proven Altera design guidelines Power distribution network (PDN) analyzer Optimize board for each design

17. Protocol Support in Software Protocol Quartus II Software v9.1 Quartus II Software v9.1 SP1 Quartus II Software v9.1 SP2 Quartus II Software v10.0 PCIe x1, x4     GbE     PCIe x2    Basic    SRIO   XAUI   CPRI  SDI  V-by-One  DisplayPort  SATA 

20. Supported I/O Standards * IP cores available, requires external PHY devices ** All data rates are subject to change. See the Cyclone IV handbook for the latest information. Sign-Ended I/O Standards Cyclone IV GX and Cyclone IV E (1.2 V) Max. Clock Rate Cyclone IV E (1.0 V) Max. Clock Rate Usage 2.5-V SSTL Class I and II 167 MHz 167 MHz DDR SDRAM 1.8-V SSTL Class I and II 200 MHz 167 MHz DDR/DDR2 SDRAM 1.8-V/1.5-V/1.2-V HSTL I and II 167 MHz 167 MHz QDR I/II SRAM 3.3-V PCI compatible 66 MHz 66 MHz Embedded 3.3-V PCI-X 1.0 compatible 100 MHz 100 MHz Embedded 3.3-V LVTTL, LVCMOS 100 MHz 100 MHz System interface 3.0-V/2.5-V/ 1.8-V LVTTL 167 MHz 167 MHz System interface 3.0-V/2.5-V/1.8-V/ 1.5-V/1.2-V LVCMOS 167 MHz 167 MHz System interface Differential I/O Standards Cyclone IV GX and Cyclone IV E (1.2 V) Max. Data Rate Cyclone IV E (1.0 V) Max. Data Rate Comment LVDS Rx 875 Mbps 640 Mbps High-speed serial LVDS Tx 840 Mbps 640 Mbps High-speed serial RSDS/Mini-LVDS transmission 440 Mbps 311 Mbps High-speed serial LVPECL 500 MHz 500 MHz High-speed clocks

22. Finish Faster with Altera Design Tools Tools Benefit Reference designs Get up and running faster with several reference designs IP (protocol packs) Get protocols up quickly (protocol packs for PCIe, GbE, and SRIO) IP portfolio Over 100 pre-built building blocks to jump start your design Development kit Prebuilt, prototyping platform

23. Cyclone IV GX Family Plan Device KLEs Total Memory (Mb) 18 X 18 Multipliers Transceiver I/Os MPLLs PLLs Hard PCIe IP Core EP4CGX15 14.4 0.5 0 2 2 1 1 EP4CGX22 21.3 0.8 40 4 2 2 1 EP4CGX30 29.4 1.1 80 4 2 2 1 EP4CGX50 49.9 2.5 140 8 4 4 1 EP4CGX75 73.9 4.2 198 8 4 4 1 EP4CGX110 109.4 5.5 280 8 4 4 1 EP4CGX150 149.8 6.5 360 8 4 4 1

25. Cyclone IV GX Speed Grade Support *-7 and -I7 speed grades are under evaluation for this package. See the Cyclone IV handbook for the latest information. Device QN148 F169 F324 F484 F672 F896 0.5 mm 11 x 11 1.0 mm 14 x 14 1.0 mm 19 x 19 1.0 mm 23 x 23 1.0 mm 27 x 27 1.0 mm 31 x 31 EP4CGX15 -8* -6, -7, -8, -I7 EP4CGX22 -6, -7, -8, -I7 -6, -7, -8, -I7 EP4CGX30 -6, -7, -8, -I7 -6, -7, -8, -I7 -6, -7, -8, -I7 EP4CGX50 -6, -7, -8, -I7 -6, -7, -8, -I7 EP4CGX75 -6, -7, -8, -I7 -6, -7, -8, -I7 EP4CGX110 -7, -8, -I7 -7, -8, -I7 -7, -8, -I7 EP4CGX150 -7, -8, -I7 -7, -8, -I7 -7, -8, -I7

26. Cyclone IV E Family Plan All Die Offered in Vcc_Core = 1.2 V and 1.0 V Device KLEs Total Memory (Kb) 18 X 18 Multipliers PLLs EP4CE6 6.2 270 15 2 EP4CE10 10.3 414 23 2 EP4CE15 15.4 504 56 4 EP4CE22 22.3 594 66 4 EP4CE30 28.8 594 66 4 EP4CE40 39.6 1,134 116 4 EP4CE55 55.8 2,340 154 4 EP4CE75 75.4 2,745 200 4 EP4CE115 114.4 3,888 266 4

28. Cyclone IV E Speed Grade Support Note: I = industrial grade (Tj = -40 ° C to 100 ° C); A = automotive grade (Tj = -40 ° C to 125 ° C), L = 1.0-V Vcc core variant E144 F256 F484 F780 Device 22 x 22 mm 0.5 mm 17 x 17 mm 1.0 mm 23 x 23 mm 1.0 mm 29 x 29 mm 1.0 mm EP4C6E -6, -7, -8, -I7, -A7 -8L, -9L, -I8L -6, -7, -8, -I7, -A7 -8L, -9L, -I8L EP4C10E Same as above Same as above EP4C15E -6, -7, -8, -I7 -8L, -9L, -I8L Same as above -6, -7, -8, -I7, -A7 -8L, -9L, -I8L EP4C22E -6, -7, -8, -I7, -A7 -8L, -9L, -I8L Same as above EP4C30E Same as above -6, -7, -8, -I7 -8L, -9L, -I8L EP4C40E Same as above Same as above EP4C55E -6, -7, -8, -I7 -8L, -9L, -I8L Same as above EP4C75E Same as above Same as above EP4C115E -7, -8, -I7 -8L, -9L, -I8L -7, -8, -I7 -8L, -9L, -I8L