A wide variety of new applications is being realized to exploit the immense computing capabilities of heterogeneous many core platforms, concurrently running multiple parallel tasks on the available cores. This is opening up to a series of technological challenges in the real-time and embedded computing market, ranging from the parallelization of existing applications, to the simultaneous elaboration of multiple sensor data, to the need for predictable timing guarantees of applications requiring a prompt interaction with the user/environment. The problem is that it is difficult to provide predictable timing guarantees when multiple cores may contend for shared resources, like memory, buses and I/O devices. A large number of results have been proposed by the real-time research community to address these issues: multi-core scheduling algorithms, schedulability tests, predictable execution models, etc. However, we are not aware of any industrial-level application that brings this wide algorithmic background to an industrial setting. We show how these problems impact real scenarios and how they were solved during the HERCULES project which came up with an integrated framework in order to achieve a predictable performance on top of low- power multi-core heterogeneous platforms. Moreover we illustrate how the framework is divided and all the techniques used in order to have such a real time system.

1. High-Performance Real-time Architectures for
Low-Power Embedded Systems
The HERCULES project
Miccio Luca
1
Università di Modena e Reggio Emilia - 15 May 2019

2. The Predictability Challenge
● Predictability is key for future
applications
○ Replacing human activities
○ Hard real-time requirements
○ Safety-critical applications
● Heterogeneous many-core systems are
inherently unpredictable
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3. The HERCULES project
● EU’s Horizon 2020 programme
● UNIMORE as coordinator (7 partners)
● Industrial-grade framework to provide real-
time guarantees on top of cutting-edge
heterogeneous COTS platforms
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4. Core components
Industrial grade
real time
framework
Energy efficient
and low cost
real time systems
Easy to use
programming
interface
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5. Critical shared resources
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Registers
L1 cache
Last Level Cache
Main memory

6. Critical shared resources
6
Registers
L1 cache
Last Level Cache
Main memory

7. Critical shared resources
7
Registers
L1 cache
Last Level Cache
Main memory

8. Critical shared resources
8
Registers
L1 cache
Last Level Cache
Main memory

9. The main problem: memory contention
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10. Real time framework overview
Hypervisor
Hardware
RTOS
Best effort task(s)
Critical
task(s)
Linux
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11. Real time framework overview
Hypervisor
Hardware
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12. Hypervisor layer: Jailhouse
● Type 1 Hypervisor
● Developed by Siemens (Jan Kiszka)1
● Focus on maintaining static partitions
● A tool to run
○ real-time and/or safety tasks
○ on multicore platforms
○ aside Linux
[1]: https://github.com/siemens/jailhouse
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13. Implemented solutions
Main memory
scheduling
Memory bandwidth
reservation
Cache
partitioning
system
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14. Co-Scheduling
● Coordinated scheduling of memory
and execution phases
● Schedule memory accesses to
master contention on architectural
bottlenecks
● Loss in performances
Compute
Memory
Memory
Main
Memory
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15. Memory bandwidth server
● Memory budget mechanism
● Hypervisor intervenes only when a task
misbehaves
● Reduced scheduling overhead
[1]: MemGuard: Memory bandwidth reservation system for efficient performance isolation in
multi-core platforms. 55-64. 10.1109/RTAS.2013.6531079. 15

16. Last level cache coloring
TASK 1
L1 cache
TASK 2
L1 cache
TASK 0
L1 cache
Last Level
Cache
● Avoid interference in last level
cache between tasks
● Each task has its own partition in
cache based on configuration
● Restore memory access
determinism
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Task 0 partition
Task 1 partition
Task 2 partition
Task 0 partition

17. Results
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18. Results with PolyBench
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19. Results with PolyBench
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20. Application use cases
...anywhere real time guarantees are needed!
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21. Thank you! Any questions?
Miccio Luca <lumiccio@gmail.com>
http://hercules2020.eu
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